Debugging SPI communication issues

Case 1: Master can't able to produce clock and data?

? Root Causes:

  • Master mode not enabled in control register.
  • SPI peripheral clock not enabled in RCC.
  • MOSI/SCLK GPIO pins not set to alternate function mode.
  • Other code overriding SPI configuration in complex projects.

Tip: Dump & inspect all SPI-related register values just before transmission.

Case 2: Master is sending data but slave is not receiving data?

? Root Causes:

  • NSS (Slave Select) not pulled low.
  • Slave’s SPI pins in Hi-Z state.
  • GPIO alternate function mode misconfigured.
  • NVIC interrupt not enabled for the slave if it uses interrupts.

Case 3: SPI Interrupts are not triggering?

? Root Causes:

  • TXEIE or RXNEIE not set in SPI CR2 register.
  • NVIC interrupt for SPI peripheral not enabled.
  • Forgetting to call NVIC_EnableIRQ().

Checklist: SPI_CR2 ? NVIC configuration ? ISR registration

Case 4: Master is producing right data but slave is receiving the different data?

? Root Causes:

  • High SPI clock (e.g., > 4MHz) with long interconnecting wires
  • Signal integrity issues due to delay/skew.
  • Must match same configuration at Spi Master and Spi Slave

Spi Modes

  • Fix: Use shorter wires or reduce SPI speed (e.g., 500KHz).

SPI Mode is most useful I found. I struggled for 2-3 days to initialize SD card in SPI mode due to mode differences for FAT file implemention using pic microcontrollers during 2012 That time SDIO interface was not available for pic microcontrollers, even today it is not available. Some PIC32 microcontrollers (MIPS-based) and SAM microcontrollers (ARM Cortex-based, acquired from Atmel) do offer SDHC or SDIO support.

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