Current flow in HIT

In my last blog, I discussed the structure of the Heterojunction Intrinsic Thin-Layer (HIT). Today I’ll tell you how current flows in HIT.

Let us consider a c-Si p-type and n-type bulk material that is sandwiched between Thin Intrinsic a-Si:H layers. On these thin intrinsic a-Si:H layers, there is a deposition of n-type and p-type a-Si:H layers. (Note: Both p-type and n-type are shown below)

Credit: Dr. Miroslav Mikolasek 

As mentioned in the last blog, a thin intrinsic layer provides a good passivation layer since it's not doped and the n and p-type a-Si:H layer provides electrons and holes for the current conduction. The top and bottom contacts coming over the n and p-type a-Si:H layers are Transparent Conducting Oxide (TCO). As these TCO and a-Si:H has wider bandgap as compared to c-Si, the light directly falls on the c-Si and due to absorption of light, electron-hole pairs are generated.

You can see above in the n-type configuration that electrons will see a ‘well’ or ‘valley’ to accumulate themselves and since the intrinsic layer is very thin, electrons can easily tunnel through and reach the n-type contact layer. However, ‘holes’ in this case would see ‘barrier’ to cross over to the n-side and would not travel. As a result of this, the electron-hole recombination frequency reduces and the electrons which otherwise had a chance to recombine with the holes are swept away towards the n-side and contribute to the current. 

The same explanation is applicable to hole transport too.

In a nutshell, by having heterojunction on both sides we provide a barrier to electrons and holes selectively and separate them so that it will not recombine before it reaches external contact. Also, these electrons and holes are not absorbed in the surface due to good passivation provided by the intrinsic a-Si:H layer. Thus, by having heterojunction a-Si:H and c-Si:H we achieve higher efficiencies due to good passivation and better carrier transport.