CHIPS Metrology SBIR Funding: A Founders Guide

National Institute of Standards and Technology (NIST) recently released information on their latest SBIR round of funding. If you're a deeptech or semiconductor founder, here's what you need to know.

SBIR’s aren’t VC funding.?

Just a gentle reminder that SBIRs are "non-dilutive" grants. The government doesn’t take equity and they're not a loan.? For most Phase I SBIR funding rounds, you are required to conduct some research, write a report, and if your work looks promising, move on to develop a prototype in Phase II. Phase I grants are often to simply conduct a feasibility study along with some research and develop an implementation plan; NIST is essentially asking you to do some research and gather data, put together a plan for how you would develop the solution, and deliver a report.? Phase II is focused on prototyping and real world demos.? Often the USG will want to see a functioning bench-top prototype at the end of Phase II.

Should I apply?

This depends a lot on your technology, funding stage, and business trajectory. Early stage startups should almost always apply, especially if a particular area aligns well with your technology roadmap. If your startup is further along to market the cost benefit of applying and overhead of managing the grant might be distracting.

How much money are we talking about here?

The CHIPS Notice of Funding Opportunity (NOFO) provides funding at different levels for the Small Business Innovation Research (SBIR) program:

1. Phase I Awards may be up to $283,500.
2. Phase II Awards may be up to $1,910,000.

There's some extra thrown into each Phase, called TABA, or Technical and Business Assistance; this is a relatively new program* that provides small business consulting services for startups that win the SBIR grants.? In my experience these have been somewhat helpful to startups, helping them to develop strategy or understand their market better.

How many awards are given out?

NIST anticipates awarding 24 awards total.

• 14 for the Open Topics (~ 2 per topic).
• 10 Closed Topic Awards (~1 per topic). ?

Who’s allowed to apply?

There are (roughly) three criteria:

1.???? Qualified Small Business, in the US, for profit, with less than 500 employees.?

2.???? The principle investigator is a full time employee.

3.???? The work must be done in the US.**

How much time do I have?

Applications are due by June 14th.?Typically you don’t want to get this all together last minute.? Some parts of the process can take weeks to complete, especially if this is your first SBIR application.? ?

What topics are being funding?

The CHIPS Office has broken these out into Open Topics (7 areas), and Closed Topics (9 total).

Closed vs Open Topics.?

"Open Topics" provide a broader opportunity for innovation across various subjects, whereas "Closed Topics" focus efforts on specific, strategic areas deemed critical by the program administrators.

Open Topics

These are based on the seven “Grand Challenges” identified by NIST.? Here NIST describes the area they want to see innovations in, but are less specific about how to address the topic.? These allow applicants to propose research projects on a wide range of subjects within the scope laid out.? Applicants have the flexibility to explore any research area that aligns with the broader goals of the CHIPS Metrology initiative, with less restriction.

The Seven Grand Challenges are . . .

1. Metrology for Materials Purity, Properties, and Provenance.? R&D to enhance detection of impurities and contaminants, ensuring uniform quality across suppliers. Solutions Sought: Development of new measurements to support tracking and quality assessment of semiconductor materials throughout the supply chain.
2. Advanced Metrology for Future Microelectronics Manufacturing.? Develop innovative metrology that keeps pace with next-generation manufacturing, integrating complex technologies. Solutions Sought: Solutions that enable detailed characterization of new materials and devices, improving accuracy and sensitivity in measurements.
3. Enabling Metrology for Integrating Components in Advanced Packaging.? Metrology that supports advanced packaging technologies, spanning multiple length scales and physical properties. Solutions Sought: Methods that facilitate rapid, in-situ measurements and verification of interfaces and subsurface interconnects in advanced packaging.
4. Modeling and Simulating Semiconductor Materials, Designs, and Components.? Advance the development of multi-physics models and robust measurement techniques for future semiconductor designs. Solutions Sought: Computational tools and data analysis methods that enable accurate simulations and models for semiconductor processes and materials.
5. Modeling and Simulating Semiconductor Manufacturing Processes.? Create advanced models and simulations of the entire semiconductor value chain to improve manufacturing yields and time to market. Solutions Sought: Development of manufacturing simulation tools and standards that can be applied to in-line processes to optimize the semiconductor manufacturing landscape.
6. Standardizing New Materials, Processes, and Equipment for Microelectronics.? Establish standards and validation methods to integrate new materials and technologies in microelectronics manufacturing. Solutions Sought: Documentary standards, calibration protocols, and reference materials that enhance consistency and reliability across new production technologies.
7. Metrology to Enhance Security and Provenance of Microelectronic-based Components and Products.? Develop standards and testing processes to address security vulnerabilities throughout the lifecycle of microelectronics. Solutions Sought: Protocols and testing processes that enhance the security, trust, and verification of components across the supply chain

Closed Topics.?

NIST is also seeking very specific solutions to some metrology challenges, with clear guidelines on what a solution will look like.? These are really specific areas of research, forgive me if I butchered them in my rush to summarize. The closed topics are:?

1. Near-Real Time RF Propagation Measurement System NIST is seeking the development of an RF channel sounder system that can automatically acquire, process, and analyze RF propagation measurements, enhancing existing designs for improved speed and accuracy.
2. Compact, Fieldable Cryogenics for Deployment of Superconducting-Nanowire Single-Photon Detectors in a Circuit-Evaluation Microscope The solution aims for advancements in compact, fieldable cryostats to support time-resolved emission microscopy with superconducting sensors, requiring minimal cryogenic expertise and maintenance from the laboratory technician.
3. TEM High Voltage Biasing Holder NIST seeks advances in transmission electron microscope (TEM) sample holders that support in-situ high-voltage biasing of device lamella during TEM measurements, accommodating higher voltages and various configurations.
4. Device-Scale AFM-Thermoreflectance Hybrid Metrology NIST seeks the development of a hybrid metrology tool that integrates thermoreflectance techniques with atomic force microscopy to achieve sub-100 nm spatial resolution in measuring thermal resistance, interface conductance, and temperature profiles in wide band-gap semiconductor devices, enhancing their design and performance without requiring a transducer coating.
5. Super-resolution Beam Scanning, Wide Bandwidth, Optical Photothermal Infrared (O-PTIR) Microscope NIST is seeking enhancements in optical photothermal infrared microscopy that enable high-resolution measurements of chemical composition and thermal properties at the nanoscale, with a requirement for O-PTIR systems to provide infrared absorption spectra and maps, as well as thermal properties, with resolutions around 500 nm spatially, less than 2 ns temporally, and high throughput capabilities.
6. High Brightness Compact X-ray or EUV Sources for Semiconductor Metrology NIST seeks the development of compact, high-intensity X-ray or Extreme Ultraviolet (EUV) sources with at least 10 times the brightness of current models and small enough footprints to fit within standard laboratory spaces.
7. Nanoscale Dimensional Metrology Reference Standards to Support Semiconductor Metrology NIST calls for advancements in IP-neutral semiconductor reference samples with advanced device structures using EUV lithography, to aid metrology development and testing.
8. Advanced Electron Backscatter Diffraction (EBSD) Detector NIST seeks development of an advanced EBSD detector with a high-resolution ASIC sensor, capable of high-speed, low-noise operations, and optimized for low kV electron detection, fitting seamlessly into standard SEM setups without interfering with other detectors.
9. TEM High Voltage Biasing Holder NIST is calling for advancements in TEM sample holders that enable in-situ high-voltage biasing up to 800 V for device lamella during TEM measurements, with specific requirements for multiple voltage leads, grounding, and compatibility with Thermo Fisher Scientific Spectra 300 instruments, aiming to enhance sample analysis under standard operating conditions.

What did I miss?

If you've read the whole 115 page document, what else is important for a #deeptech founder to know about in the recent CHIPS SBIR Program?

* - (TABA is new to NIST; DoD pioneered this service)

** - Applicants can make requests for exemption here. The NOFO says, "The R/R&D work must be performed in the United States. Requests for an exemption must be submitted in writing at the time of application submission."