Chip designers Technology for data centre
Sampath VP
ASIC/FPGA Design Professional | SoC Architecture | Technology Evangelist | IEEE Reviewer|
Gen-Z technology supports a wide range of new storage class memory media and acceleration devices, features new hybrid and memory-centric computing technologies, and uses a highly efficient, performance-optimized solution stack.
The goal was an open and royalty-free "memory-semantic" protocol, which is not limited by the memory controller of a CPU.
The basic operations consist of simple loads and stores with the addition of modular extensions. It is intended to be used in a switched fabric or point-to-point where each device connects using a standard connector.
Its memory media independence and high bandwidth, coupled with low latency, enables advanced workloads and technologies for end-to-end secure connectivity from node level to rack scale. Learn more about the technology
Chip designers looking to successfully develop Gen-Z products need several key ingredients, as detailed hereafter:
- SoCs, Switches, storage media controllers and other types of Gen-Z devices all require configurable, high quality controller IP to enable connection to the Gen-Z fabric. At the time of this writing, two IP vendors, members of the Gen-Z consortium have announced current and future availability of Gen-Z controller IP.
- Initial Gen-Z implementations are set to focus on proven, deployed NRZ PHY signaling technology and speeds, leveraging the availability of PCIe PHY at 16 and 32 GT/s and IEEE802.3 PHY at 25 GT/s. Later deployments are likely to leverage advanced PAM4 PHY signaling rates such as 56 and 112 GT/s.
- Availability of comprehensive Verification IP (VIP) tools is essential in guaranteeing the quality of the Gen-Z IP before and after integration in a SoC. At the time of this writing, two vendors have announced availability of Verification IP for Gen-Z.
- FPGA prototyping is a necessary step in ensuring functionality and interoperability at the system level. Current FPGA technology allows for prototyping Gen-Z up to 56 GT/s (PAM4) and 32 GT/s (NRZ). Connectors are also being developed to enable multi-lane Gen-Z signaling at these rates, over copper and optical connections. FPGA prototyping boards are available from multiple vendors and it is expected that Gen-Z specific prototyping platforms based on FPGA technology will become available soon.
The Gen-Z consortium includes members from every segment in the technology space. This ecosystem is essential to build a viable product ecosystem where all the necessary hardware and software components interoperate with one another.
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