Cadence and MathWorks Announce Flow from MATLAB to RTL

Today in Yokohama at CadenceLIVE Japan, Cadence announced a new MATLAB/Stratus flow integration jointly developed and supported by MathWorks and Cadence. This automates the path from MATLAB to Stratus and RTL allows an automatic flow from MATLAB through Stratus to RTL, and then onward through the Cadence Digital Full Flow all the way to implementation. Historically, I have attended CadenceLIVE Japan, but DAC is also this week and, for Covid-related reasons, there is no simultaneous translation into English of the keynotes and the main track. So I wasn't there in person—hopefully, next year!

When RTL synthesis took over the world in the 1990s, there was a lot of speculation as to what would come next. The received wisdom at the time was that it would be "behavioral synthesis" of some sort, taking the input language up a level to where the clock was no longer explicit. It turned out that this was the wrong answer, and the right answer was "IP". Big chips, by then starting to be known as SoCs, were designed with microprocessors, memories, peripherals, and specialized I/O interfaces. Most of the complex algorithms were implemented in software on the microprocessor. But it was clear that this was far from optimal for algorithms like radar and video processing, which required the higher performance that came with implementation directly into datapaths and gates.

MathWorks and the Flow

In parallel, MathWorks (then called "The" MathWorks) had a product MATLAB that became the standard tool for developing those sorts of algorithms. The problem was that MATLAB?was one island, and synthesis?was another island. There were two ways to get across the strait between the islands. One was to use HDL Coder from MATLAB to write out RTL. This worked fine, in the sense that the RTL represented the behavior in MATLAB, but it had no forward visibility of power, performance, and area (cost) of the resulting silicon.

The second approach is shown below. The results of MATLAB's analysis would be hand-coded into RTL, and the RTL could then be evaluated for the PPA that would result.?The challenge was that if this was inadequate in some way (too slow, too big) then the RTL would have to be re-written by hand which is slow and time-consuming

Read more...