# 001 Buffering in Routers
Many ASICs companies are developing ASICs to cater to different router needs. These router ASICs are either input-buffered, or output-buffered. Do we know what the main difference is and why we do it differently. The difference between input-buffered and output-buffered routers lies in where the buffering of packets occurs within the router. Buffering is used to manage congestion and ensure that packets can be handled efficiently as they move through the router. Here’s a detailed comparison of both type
?Input-Buffered Routers
In input-buffered routers, the packets are buffered at the input ports before they are processed by the switch fabric and forwarded to the output ports.
Key Characteristics:
Advantages:
Disadvantages:
领英推荐
Output-Buffered Routers
In output-buffered routers, the packets are buffered at the output ports after they have been processed by the switch fabric.
Key Characteristics:
Advantages:
Disadvantages:
?
The choice between input-buffered and output-buffered routers depends on the specific requirements of the network and the trade-offs that can be managed. Input-buffered routers can be simpler in terms of output port design but suffer from HOL blocking. Output-buffered routers can achieve higher throughput and avoid HOL blocking but require more memory at the output ports and can face scalability issues. Can routers be fabric-buffered and mix of all buffering, answer is yes. More to come soon on that topic…
#routers # buffering #HOL
Design Eng Director at Xilinx || Datacenter SmartNIC || Networking || 5G || FPGA || ASIC
5 个月Packet buffer sizing is another important parameter to consider. The trend across the industry, regardless of the application (switching/routing) demand, is to minimize buffering as much as possible without adversely affecting QoS. It relies on traffic engineering, advanced end-to-end congestion control algorithms, and active queue management (AQM) to notify congestion to the endpoints early and to keep the links saturated with small delay-bandwidth buffers.