Boot ARM SoC

VLSI chip design industries are moving toward more and more complex design in single silicon which integrates the multiples cores as well. The ARM CPU will fetch an instruction from either 0x0 or 0xffff0000 (for a Cortex-M, it is data as opposed to an instruction). Typical ARM SOC have some boot rom which uses this mechanism. For an end user, you need to consult a manual to determine how to get your code to run. ie, there is a BIOS built in to many ARM SOC which use the vector, but you need to use something different to get your code to run.

 Typically the ARM SOC will support multiple boot devices. The device is determined by some FUSE or by sampling pins. The pins will be CPU outputs in a running system, but have been pulled up/down to configure a boot device. Each boot device will have peculiar details; ROM is simple, but NAND flash, SPI flash, MMC, etc need some configuration details. These are also often provided by a on-chip FUSE and/or sampling pins.

A small portion of the device maybe read to further configure the device. For a deeply embedded ARM chip, it may only boot from on-board flash and this process is much simpler; but I believe from the context of the question you are referring to more advanced ARM CPUs. More advanced ARM systems have a boot loader. This is because the amount of code a ROM loader will load is often limited and/or restricted. It is also often complex to set up SDRAM and the boot loader may be structured to run from internal static RAM, which configures the SDRAM.

SoC configuration

       The configuration block captures and holds static SoC configuration data. SoC configuration is captured from the AXI master RDATA bus input pads while the SoC is held at reset, sequenced by an off-chip device. The configuration block has two main control inputs, CONFIGINIT and nCONFIGCLR. These inputs are completely independent of other clocks and resets in the design. They enable you to control the configuration block directly.SoC configuration inputs are sampled on the rising edge of CONFIGINIT.

 Use nCONFIGCLR to reset the configuration block to a default configuration.Select test mode by setting the TESTMODE input HIGH. The configuration block is fully scan inserted to enable full control of the configuration inputs. Some configurations must however, be under user control or held static during test. For this purpose, the configuration block has test inputs that enable you to drive configurations directly. Must disable the internal feedback and input dividers to use the PLL to de-skew the off-chip AXI interface to the on-chip SoC clock. Must also enable the PLL, not bypass the VCO, enable de-skew, and set the VCO range correctly to use PLL de-skew mode.

The following signals are brought directly out to pins to enable debug of the development chip:

·     SPIDEN

·     SPNIDEN

·     DBGEN, considered as IDEN

·     NIDEN.

They are synchronized to:

·     the core clock domain for use within the IEM subsystem

·     the AXI clock for use within the Core Sight subsystem.

                                   Figure 1.Boot sequence

BIOS tasks

?     Check CMOS setup for custom settings

?     Load the interrupt handlers and device drivers

?     Initialize registers and power management settings (ACPI)

?     Initializes RAM

?     POST (Power on Self-test)

?     Display BIOS settings

?     Determine which devices are bootable

?     Initiate bootstrap sequence

Bootable devices

?     To boot an operating system, BIOS runtime searches devices that are both active and bootable in the order of preference defined in CMOS settings

?     Bootable device can be:

–    Floppy Drive

–    CD-ROM

–    Partition on HDD

–    Device on network

USB flash memory stick

MBR

Kernel initialization

Sample initialization

void __init trap_init(void)

{

 set_trap_gate(0,&divide_error);

 set_intr_gate(1,&debug);

 set_intr_gate(2,&nmi);

 set_system_gate(4,&overflow);

…

 set_intr_gate(14,&page_fault);

…

 set_system_gate(SYSCALL_VECTOR,&system_call);

…

}

?     Checks for bugs in architecture (check_bugs)

?     Replaces certain assembler instructions – depending on processor type – with faster, modern alternatives.

?     Last two actions of start kernel:

?     rest_init : New thread that performs some more initializations and starts the first user-space program /sbin/init

?     The original kernel thread becomes the idle thread that is called when system has nothing else to do