Blockages and Null Shorts
Mahesh Chandra Yachamaneni
EDA Tools Software Engineer @ Intel | Chip Design Enthusiast
Blockage is layer datatype that allows a designer to tell the APR tool not to place any routing metals in the specified areas. But it will not be physically processed on silicon in real-time. It is merely a way to block routing in some areas to achieve different purposes like alleviating congestion, avoiding top-level DRC violations, and others.
However, the APR tool might not always be able to adhere to the blockages defined by the designer, leading to metals being placed in undesired regions. When this happens, there should be a means to tell the designer about it, and the APR tool flags null shorts for this purpose.