5 steps to safe FPGA design
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5 steps to safe FPGA design


Let's say you’ve got an innovative, game-changing product idea.

Your design can do a lot of things, several more than the competitor.

Have you considered what will happen when it does things it shouldn't?

Safety is best integrated into FPGA designs from the beginning, and here's a quick rundown on how to make that happen:

1. Get familiar with the technology

Get to know the embedded built-in capabilities of the device you are using, and take advantage of them.

2. Architect for mitigation

Evaluate architectural mitigations to shield your design from unintended failures.?

3. Think about redundancy

Consider a?redundant?or?triplicate?implementation with built-in checking features to filter out errors before they cause damage.

Partition your architecture?during the conceptual design phase to enable these isolation techniques.

4. Process, process, process

Use a rigorous design methodology to provide protection against design faults.

Multiple checkpoints?throughout the lifecycle using reviews and common design standards can help eliminate failures.

5. Consider the unlikely

When developing a verification suite, add abnormal “what-if” situations to address potential design vulnerabilities.

Like secure systems, the safest systems employ a?layered approach?utilizing multiple techniques. Implementing a number of the practices pointed out here will get you the best results.

Can you think of a sixth tip to making sure #FPGA systems are built with safety in mind? Let us know in the comments!


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