3D-NAND equipment market: a long-term growth

Extracted from: Equipment and Materials for 3D NAND Manufacturing 2020, Yole Développement, 2020 - NAND Quarterly Market Monitor, Yole Développement, Q3 2020 - YMTC’s 3D-NAND Flash Memory, System Plus Consulting, 2020

OUTLINES:

• 3D-NAND has become a mainstream technology because of its excellent scalability that allows increased bit density and lower cost-per-bit via vertical stacking of memory cells.
• Advances in the field of 3D-NAND manufacturing are enabled by both equipment and material developments.
• Market figures:

3D-NAND market is expected to grow to US$81 billion in 2025 with a 11% CAGR[1] between 2019 and 2025.

The 3D-NAND equipment market including etching, deposition and lithography, will grow to US$17.5 billion by 2025, showing a 9% CAGR during the same period.

• Technology status: 3D-NAND memory manufacturers will adopt different strategies to increase the number of layers and the overall bit density per die.
• Competitive landscape:

The equipment market is dominated by USA, followed by Japan and Netherland.

Four companies, ASML, Applied Materials, Tokyo Electron and Lam Research – hold more than 70% of the overall equipment market.

In the 3D NAND business, Samsung is the clear technology leader with fierce competition from WD-Kioxia, followed by SK hynix and Micron-Intel.

Leading the NAND memory market in China, YMTC looms on the horizon and threatens to disrupt the status-quo.

“The 3D-NAND manufacturing equipment market will keep growing, propelled by robust long term NAND-bit demand and ever-increasing manufacturing complexity.” asserts Simone Bertolazzi, PhD, Technology & Market analyst with the Semiconductor & Software division at Yole Développement (Yole).

The 3D-NAND equipment market spanning etching, deposition and lithography equipment is expected to grow from U$11 billion in 2019 to US$17.5 billion by 2025. This industry will be driven by the etching market segment, with a CAGR around 10%, and deposition, with a CAGR around 9%, between 2019 and 2025. Four companies are leading this market, announces the market research & strategy consulting company Yole Développement: Applied Materials, ASML, Tokyo Electron and Lam Research.

For the 3D NAND business, market figures are significant: Yole’s analysts announce a 11% CAGR between 2019 and 2025 with a growth from US$44 billion to US$81 billion at the end of the period. “3D NAND does not require advanced lithography, but it is highly demanding in terms of deposition and etching, as sophisticated HAR[2] dry etching tools are needed for processing deep and narrow structures in dielectric stacks,” comments Simone Bertolazzi from Yole.

In this context, Yole and System Plus Consulting, both part of Yole Group of Companies, investigate disruptive memory technologies and related equipment and materials markets in depth. Their aim is to point out the latest innovations and underline the business opportunities. Both partners announce today with three NAND dedicated analyses:

·        NAND Quarterly Market Monitor, Q3 2020 update that is following the NAND industry with key market figures and trends, quarter by quarter. This monitor also proposes a high added-value focus on the leading NAND players with a relevant analysis of their market positioning and strategy.

·        Equipment and Materials for 3D-NAND Manufacturing 2020 report proposes an extensive knowledge of the NAND business and related manufacturing equipment/processes. This report is the result of a tight collaboration between Yole’s memory and semiconductor manufacturing teams and System Plus Consulting technology & costs analysts, who carried out a detailed analysis of the leading-edge 3D NAND devices by all suppliers.

·        In addition, System Plus Consulting delivers a special focus on the rising memory company YMTC, that is leading the Chinese market today, with a dedicated report, YMTC’s 3D-NAND Flash Memory.

With those three analyses, System Plus Consulting and Yole present a unique understanding of the NAND and 3D-NAND industry.

What are the economic and technical challenges of the 3D-NAND industry? What are the COVID-19’s impact on this business? Who are the top NAND manufacturers and equipment suppliers? What are the key drivers of these industries?

Discover today the vision of the 3D-NAND industry from System Plus Consulting and Yole’s analysts.

In the NAND Quarterly Market Monitor, Q3 2020, analysts affirms that NAND’s competitive landscape remains incredibly dynamic. Samsung is utilizing its massive new Pyeongtaek site and expanding its facilities in Xi’an, China; Kioxia and its partner Western Digital continue to expand their footprint in Japan; Micron and SK Hynix remain competitive despite smaller manufacturing capacities; and Intel has emerged as a stand-alone supplier with capacity in China. In addition, it is also important to notice SK Hynix acquisition of Intel’s NAND business that took place on October 20th. This acquisition has been deeply analyzed by Walt Coon, VP of NAND and Memory Research, part of the Semiconductor, Memory & Computing division at Yole, in the article: Yole Développement dissects Intel-SK Hynix US$9 billion NAND deal. Discover it on i-Micronews.

Meanwhile, a new entrant looms on the horizon: China’s YMTC, which threatens to disrupt the status-quo. Indeed, YMTC is the leading NAND memory maker in China.

According to Walt Coon, from Yole: “The company is currently shipping 64-layer NAND in low volumes domestically, including SSDs, with 128-layer production under development (shipments expected in 2021). YMTC’s 2020 ramp has been hampered by COVID-19, with delays in equipment deliveries/installations at its Wuhan manufacturing site”.

In its YMTC’s 3D-NAND Flash Memory report, System Plus Consulting’s analysts deeply analyzes the technical choice made by YMTC. The Chinese memory company developed its new 3D-NAND XtackingTM architecture with two wafers for its 64-layer 3D-NAND memory, instead of a single wafer used in conventional 3D NAND memories.

Belinda Dube, Technology & Cost Analyst at System Plus Consulting comments:

“CMOS periphery and NAND array wafer are manufactured separately. Wafers are connected by copper to copper hybrid bonding. And the bonding technique needs a high level of accuracy and alignment precision to perfectly join the metal layers from different wafers. YMTC’s Xtacking process allows the company to increase its die density”.

YMTC’s memory enters the NAND flash market as a solution to cater for higher I/O[3] speed because of the use of advanced CMOS that can be manufactured on a different wafer from the NAND array. Consequently, this memory provides the combination of high speed and large density characteristics.

In the highly competitive 3D-NAND business, there is need for ad hoc tools capable of addressing complex challenges:

·        Etching tools must drill deep channel holes from the top of the device to the bottom substrate.

·        Deposition tools must produce high-quality defect-free thin films with nanometer thicknesses.

·        Metrology/Inspection tools are also becoming essential to monitor the processes and maintain high yields. Ideally, these challenging tasks need to be accomplished in the fastest possible time and lowest cost.

“In this framework, the competition among equipment suppliers to deliver the best solutions is growing fierce,” comments Simone Bertolazzi. “Besides equipment technology development, a great deal of R&D effort has to be focused on finding new material solutions.”

In this context, specific technical strategies are needed for next-generation 3D-NAND products. Three focus areas have been identified by Yole’s memory team:

·        String-stacking: whereas all players have already adopted a double-stack approach, Samsung, the industry leader, is the only player to develop the 128-layer generation with a single-string approach and thus enjoys higher margins on NAND than other chipmakers. For the following generation, Samsung is expected to adopt double stacking. 

·        Cell Architecture: all the manufacturers except Intel have adopted the CT[4] solution for their 1xx 3D NAND technologies. Intel has recently announced the sale of its 3D-NAND business to SK Hynix, and Yole expects they could shift from FG[5] to CT as the deal with SK Hynix moves forward. The transfer of the NAND business is expected to be completed by 2025. 

·        Logic circuit position: besides Micron, with CUA[6], SK Hynix, with 4D-NANDTM, and YMTC, with XtackingTM, all players need to implement specific solutions to minimize the silicon-area consumption of the CMOS logic circuit. Nowadays, all major 3D-NAND manufacturers are carrying out R&D activities to explore the use of wafer-to-wafer stacking approaches based on hybrid bonding. Samsung has not yet disclosed an approach to minimize the CMOS logic circuit area and a has strong know-how in bonding technologies stemming from its CIS[7] and HBM[8] businesses. It could be a potential candidate for the adoption of hybrid bonding for 3D-NAND. SK hynix could follow Samsung...

Both partners, System Plus Consulting and Yole underline the difficult technical challenges in their latest technical & market analyses. According to the analysts, they should be addressed via close collaborations between equipment suppliers and memory manufacturers… Stay tuned on i-Micronews to discover more and more relevant and dynamic analyses of both companies and follow the memory industry.

All year long, Yole Développement and System Plus Consulting publish numerous memory, equipment and materials-related reports and monitors. In addition, experts realize various key presentations and organize key conferences. In this regard, do not miss the Flash Memory Summit – 2020 conference in Santa Clara (California) From Tuesday 10, November to Thursday 12, November 2020.

Make sure to be aware of the latest news coming from the memory industry and get an overview of their activities, including interviews with leading companies, articles, webcasts and more on i-Micronews. Stay tuned!

[1] CAGR : Compound Annual Growth Rate

[2] HAR: High Aspect Ratio

[3] I/O : Input/Output

[4] CT : Charge Trap

[5] FG : Floating Gate

[6] CUA : Circuit-Under-Array

[7] CIS: CMOS image sensor

[8] HBM: High-Bandwidth Memory

Sources: www.yole.fr - www.systemplus.fr