University of Michigan Transportation Research Institute UMTRI的动态

Our paper titled "OpenNTT: An Automated Toolchain for Compiling High-Performance NTT Accelerators in FHE" will be presented next week at ICCAD 2024. ???? Congratulations to the authors: Florian Krieger, Florian Hirner, Ahmet Can Mert, and me. ICCAD is a top venue for Electronic Design Automation research for circuits and systems. The main contribution of the paper is a fully automated, #opensource hardware accelerator framework with parameterization that efficiently compiles Number-Theoretic Transform (NTT) hardware accelerators with reduced memory usage and increased processing speed in #FHE and #ZKP. You provide parameters to the tool and get hardware RTL as output. Link to the paper and tool: https://lnkd.in/eUjYNn5n

Just in case you missed it (like I did ?? ) ISPSD 2024 proceedings are published ! I am pleased to share that I have co-authored a paper related to my initial project at Nexperia, which involved a study on the reduction of reverse recovery charge (Qrr) through Platinum implantation. My contribution to this research was the modeling of Platinum diffusion using Synopsys Inc #Sentaurus #TCAD #SProcess simulator (#Alagator). The simulations were enjoyable and enriching. I invite you to read the paper for further insights into our findings. #tcad #semiconductorindustry #synopsys #sentaurus #process #ispsd #simulation #cad #ieee #research

The recent Memorandum of Understanding between CGD and ITRI marks a significant milestone in the realm of power device innovation. This collaboration encompasses various aspects such as the exchange of domestic and international market insights, collaborative visits to potential clients, and joint promotional activities. CGD, a fabless semiconductor company specializing in clean-tech solutions, is committed to advancing energy-efficient GaN-based power devices to enable the creation of more sustainable electronics. Andrea Bricconi, the Chief Commercial Officer at CGD, expressed enthusiasm about the partnership with ITRI, highlighting the latter's extensive experience in power system development and patent portfolio. Bricconi mentioned plans to showcase some of ITRI's board designs featuring CGD's unique IC chip architecture at the upcoming PCIM show in Nuremberg in June. These innovative products leverage CGD's technology and ITRI's patented designs to achieve compact product sizes, enhanced efficiency, increased power density, and competitive pricing. #electricalengineering #electronics #embedded #embeddedsystems #electrical #computerchips Follow us on LinkedIn to get daily news: HardwareBee - Electronic News and Vendor Directory

Going ASIC has often been perceived risky and expensive. However, the experience of the past two years suggests ASIC can be a shift towards a more robust supply chain and a compelling value proposition. During this session, Cedric Mayor, CEO of Presto Engineering, will dive into the reasons and methods that make ASIC-enabled projects a game-changer. Join us at embedded world Exhibition&Conference in the Exhibitor Forum on April 9th at 12:00 pm to learn more! #asicdesign #semiconductorindustry #semiconductormanufacturing ?

Semiconductor packaging is a big topic - and Quanscient can offer a solution. If this is your area of work, be sure not to miss this webinar!

Dear network, Please find below our paper co-authored with Alain Bravaix and Xavier Federspiel. It presents an innovative approach to gate oxide breakdown modeling under Off-state TDDB condition based on the leakage current analysis instead of the electric field. Within Drain Avalanche Hot-carrier injection mechanism paradigm, we have successfully correlated the evolution of the leakage current with the amount of injected hot carriers in the gate oxide, triggering to its breakdown. This was robustly validated across various technology nodes and could well be extended to news transistor architectures. We anticipate discussing these extensions in our forthcoming publication. So let’s enjoy It!!! ?? #Offstate #OSS #TDDB

We encourage you to explore one of the August TCAS-I Paper Highlight videos "Analysis and Design of a Sub-Sampling PLL of Low Phase Noise and Low Reference Spur". ?? Authored by: Hao Xu; Shujiang Ji; Yizhuo Wang; Xinyi Lin; Hao Min; Na Yan This paper presents a sub-sampling PLL that tackles the reference spur caused by VCO load modulation from the sub-sampling operation. A complete analysis including the impact of the VCO buffer is provided, followed by practical design guide to achieve the optimum spur/jitter trade-off. The proposed sub-sampling phase detector incorporates an active primary-secondary architecture to further improve isolation. The adaptive frequency locked loop consumes zero static power in the locked state and activates itself once unlocking is detected. Fabricated in a 40nm CMOS process, the prototype PLL achieves 185fs jitter and -73dBc spur with 1.1mW power. The state-of-art performance validates the theory and the proposed techniques. Watch the video to learn more ?? ?? Read the paper on IEEE Xplore here: https://loom.ly/me7Iqug #IEEECASS #TCASI #AugustHighlight

#TeamAltair at IEEE APS/URSI 2024 Florence (IT) !! If you are IEEE APS/URSI 2024 Florence (IT), stop by the Altair booth #33 to learn about #AltairFeko and EM Simulation software !! Meet Ulrich Jakobus, C.J. Reddy, Christoph M?urer and Carlo Damiani at the booth !! #Altair #Onlyforward #electromagnetics #simulation #software

excellent tool and easy to use

EM Simulation Day is around the corner? Use the opportunity to hear from fellow CST users, as Morten S?rensen, Force Technology, and Jari Van Wonterghem, Radientum will join us to share their extensive experiences in EM simulation: ?3D Full Wave EMC Simulation in an Industrial Context ?Evolution of Antenna Simulations: a Personal Story We still have a couple of seats left. Save yours now: https://lnkd.in/dUcKMuGj #simulation #electromagnetics #productdevelopment