Sylvia Xiao的动态

Connecting user RTL to AMD Versal AI Engine Discussing with "traditional" FPGA/RTL developers I realized that AMD did not have a good tutorial to connect "traditional" FPGA designs to the AMD Versal AI Engine using the Vitis acceleration flow (which is mandatory for AI Engine development). So I wrote the following tutorial https://lnkd.in/gbjeWBMS I hope this is useful ;) #amd #versal #aiengine

GenAI v1-Q launched with 4 bits Quantization support to accelerate larger LLMs at the Edge https://lnkd.in/eY5u5VXt Raiderchip has presented a new HW accelerator product adding 4-bits and 5-bits Quantization support (Q4_K and Q5_K) to the extraordinary efficiency of the base GenAI v1. The new Generative AI LLM hardware accelerator runs inside FPGA devices, incrementing inference speed by 276% while reducing memory by 75%.

The #RISCV era is upon us! “The inherent flexibility of RISC-V provides a platform and when that is combined with customization technology things really get interesting.” #RISCVeverywhere At DAC 2024, Codasip demonstrated an AI inference algorithm for anomaly detection executing on a customized embedded RISC-V core – all of which is running on an FPGA board. Read Codasip’s recent blog to learn more: https://hubs.la/Q02KvB520

Learn how to maximize your AI compatibility via flexible pre- and post-processing with Jayson Bethurem of Flex Logix Technologies, Inc. at the 2024 Embedded Vision Summit. At a time when IC fabrication costs are skyrocketing and applications have increased in complexity, it is important to minimize design risks and maximize flexibility. Jayson will show us how embedding FPGA technology can solve these problems—expanding your market access by enabling more external interfaces, accelerating your compute envelope and increasing data security. Use code SUMMIT24-EB-S for 15% off your pass: https://lnkd.in/gznyU7hA

GenAI v1-Q launched with 4 bits Quantization support to accelerate larger LLMs at the Edge The new version brings a 276% speed increase for the top LLMs in low-cost systems, while maintaining their intelligence. Spain, September 24, 2024 -- Raiderchip has presented a new HW accelerator product adding 4-bits and 5-bits Quantization support (Q4_K and Q5_K) to the extraordinary efficiency of the base GenAI v1. The new Generative AI LLM hardware accelerator runs inside FPGA devices, and is ideal for boosting their capabilities with low-cost DDR and LPDDR memories, incrementing inference speed by 276%. https://lnkd.in/g9BcVQdA

?? Ready to elevate your projects? Discover the power of the XCZU47DR-2FFVG1517I, the game-changer in the world of embedded systems! This versatile FPGA SoC from Xilinx offers unmatched performance and flexibility for your next big innovation. Whether you're working on AI, machine learning, or high-speed data processing, this chip has got you covered! ?? #TechInnovation #FPGA #EmbeddedSystems

Xceler systems had developed an accelerator that can implement complex spatial data flows and take advantage of temporal data flows. The accelerator allows for legacy code acceleration and models like transformers to work on the edge at low power. In benchmarking data, the system even in an FPGA at 40 MHz did blazingly fast matrix multiplies. Our engine took only 250 cycles for an 8x8 matrix multiply with floating point numbers, while a 1 GHz ARM cortex took about 68,000 clock cycles for the same operation. Although the system was built for speeding up legacy code, memory operations (as expected) constrained it. Check out the benchmarking data we did at 40 MHz and using unit clocks. Similar data is available for image processing vs. GPUs of the day. #acceleration #lowpower #benchmarking #spatialdataflows #temporaldataflows #AI #ML #Neuralnets

Future-Proof Your Compute: The FPGA Advantage ?? In a world where data and compute demands grow exponentially, FPGAs are becoming the heroes in high-performance computing. VMAccel is at the forefront, offering FPGA-as-a-service to revolutionize your computational tasks. Whether it's for AI, finance, or biotech, prepare to exceed benchmarks with our state-of-the-art FPGA technology. #HighPerformanceComputing #FPGA #TechInnovation

“Altera is leading the new #FPGAi era.” Sandra Rivera, Altera CEO. During our Altera brand launch we announced our goal to bring leading FPGA technologies to innovators. ? Today, we’re excited to announce that Agilex? 5, the first FPGA with AI infused throughout the fabric is now broadly available. We’re also sharing a whole host of solutions, toolkits and products that will help our customers accelerate their innovations and stay competitive. Read the article for the full details on all of our exciting announcements at #EmbeddedWorld. https://lnkd.in/gwkyfM2J #WeAreAltera #AcceleratingInnovators #FPGAinnovation

The Electropages team met Paul Williamson from Arm at embedded world Exhibition&Conference, who introduced their latest #AI accelerator for edge devices, the Ethos-U85, aimed at enhancing #microcontroller capabilities significantly compared to the previous generation, Ethos-U55 and Ethos-U65. The Ethos-U85, currently demonstrated on #FPGA, represents a forward leap by #arm in microcontroller design, promising substantial improvements in speed and efficiency for embedded applications starting next year. This development aligns with arm's focus on low-power, high-performance solutions suitable for devices like doorbell cameras which require real-time responsiveness. This isn't one to miss ?? https://lnkd.in/ez4NtfH2 #embeddedworld #ew24 #embeddedworld24 #electronics #embedded #embeddedsystems #technology