Having a great "first since out of stealth-mode" DVCon U.S. The attendance this year seems higher than usual and we have had some great conversations at our booth and catching up with old friends. Most popular discussions have been our Gen AI capabilities, how to verify at high-level and what SystemVerilog looks like to design at high-level. Everyone is liking (and surprised) that we are doing a real demo at a show!! Last day today so hope to see you there.
Principal Verification Engineer at CPU, Formal Verification, NVIDIA
2 周Nice to see you Badru Agarwala at the DVCON25