Mentis Systems的动态

#hiring Staff SoC Performance Engineer, Austin, United States, fulltime #opentowork #jobs #jobseekers #careers #Austinjobs #Texasjobs #ITCommunications Apply: https://lnkd.in/gDTuKynm Arm System IP enables designers to build Arm AMBA systems that are high performance, power efficient and reliable. Configurable for many different applications, System IP is the right choice for your system whether it is a high-efficiency IoT endpoint or a high-performance server SoC. The collection of silicon proven interconnects, security IP, system controllers, debug and trace and IP tooling are all designed, validated and optimized to be used with Arm Cortex processors and Arm Mali Multimedia IP. Drive the open AMBA interface standard, System IP provides design teams with the foundation for building better systems. Job Description: We are looking for experienced SoC performance engineers who are passionate about enhancing system performance on Arm IPs. This role will involve collaborating with a brilliant team of architects and performance engineers in driving the development of new high-performance interconnect IPs. Your contributions will help in optimizing Arm systems in the infrastructure, automotive, and mobile space. You will apply your performance analysis skills in modeling and evaluating new features for future IPs, and will play a key role in productizing performance models for partners in the Arm ecosystem. Responsibilities: Collaborate with micro-architects and validation engineers to develop cycle-accurate timing models, and drive new feature development for coherent and non-coherent interconnects.Develop a high quality, correlated model for customer evaluation and internal analysis.Work closely with internal and external teams, delivering the collateral needed to develop the highest performing systems based on Arm technology.Validate performance expectations on the IP by designing test suites, identify performance bottlenecks and propose solutions. Required Skills and Experience: Minimum Bachelor's Degree in Electrical Engineering, Computer Engineering or Computer Science with a strong background in computer architecture, microarchitecture, and performance analysis.Minimum of 4 years of experience within the SoC Performance Modeling, RTL in the semiconductor industry.Consistent track record in developing cycle accurate performance models, and evaluating microarchitectural features for performance improvements in future interconnects.Proficient in C++ for programming for large-scale software development, familiarity with SystemC TLM, and Python scripting language skills. Nice to haves: Knowledge of interconnect micro-architecture design, PCIe and CHI protocols.Understanding of workloads used for performance optimization.Experience with performance verification methodologies, and correlating software models to RTL. In Return: We offer a hybrid approach to home and office working t

#hiring Senior Principal Engineer - Signoff, San Jose, United States, fulltime #jobs #jobseekers #careers #SanJosejobs #Californiajobs Apply: https://lnkd.in/gHJm88eh Job Overview: Arm has formed a new group to develop outstanding silicon demonstrators based on Arm's IP compute sub-system solutions and addressing markets such as premium mobile, infrastructure and automotive. Using the latest nodes, e.g. 3nm today, and applying the latest SoC 2.5D and 3D technology, Arm's ambition is to demonstrate industry outstanding performance by architecting, designing, implementing, and fabricating innovative silicon chips. Responsibilities: Your responsibilities will involve developing challenging electrical signoff methodologies. These methodologies will balance accuracy and yield on silicon. The following are the immediate challenges we will be working on as a team: We will develop a Static Timing Analysis flow that is standardized and is usable by all silicon groups within Arm We will work on strengthening our methodologies to analyze static and dynamic IR drop on the SoC. We will release a qualified flow that enable STA with back annotated voltage Electromigration analysis at the SoC level is another key responsibility of this role. Including Local thermal effects as part of electromigration analysis is a key criteria! Soft Error rate is a key concern for Infrastructure and Automotive SoC's. We will develop methodologies to analyze and alleviate the impact of Soft Error rate on SoC's Required Skills and Experience : Experience in developing Signoff methodologies such as Aging, STA, EM IR in advanced process nodes. Experience in collaborating across silicon engineering groups in your organization as well as with EDA vendors Work experience in Physical Implementation and Signoff methodologies Must have worked on methodology development on 5nm or 3nm technologies Strong data analysis skills to fetch data, analyze and provide practical insights "Nice To Have" Skills and Experience : Masters in Electrical Engineering Strong coding skills in Python or R or an equivalent language Strong presentation skills Salary Range From $2 46,925.00 To $ 319,550.00 We value people as individuals and our commitment is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process. In Return: We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

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#hiring Senior Principal Engineer - Signoff, San Jose, United States, fulltime #jobs #jobseekers #careers #SanJosejobs #Californiajobs Apply: https://lnkd.in/d3JpHyAn Job Overview: Arm has formed a new group to develop outstanding silicon demonstrators based on Arm's IP compute sub-system solutions and addressing markets such as premium mobile, infrastructure and automotive. Using the latest nodes, e.g. 3nm today, and applying the latest SoC 2.5D and 3D technology, Arm's ambition is to demonstrate industry outstanding performance by architecting, designing, implementing, and fabricating innovative silicon chips. Responsibilities: Your responsibilities will involve developing challenging electrical signoff methodologies. These methodologies will balance accuracy and yield on silicon. The following are the immediate challenges we will be working on as a team: We will develop a Static Timing Analysis flow that is standardized and is usable by all silicon groups within Arm We will work on strengthening our methodologies to analyze static and dynamic IR drop on the SoC. We will release a qualified flow that enable STA with back annotated voltage Electromigration analysis at the SoC level is another key responsibility of this role. Including Local thermal effects as part of electromigration analysis is a key criteria! Soft Error rate is a key concern for Infrastructure and Automotive SoC's. We will develop methodologies to analyze and alleviate the impact of Soft Error rate on SoC's Required Skills and Experience : Experience in developing Signoff methodologies such as Aging, STA, EM IR in advanced process nodes. Experience in collaborating across silicon engineering groups in your organization as well as with EDA vendors Work experience in Physical Implementation and Signoff methodologies Must have worked on methodology development on 5nm or 3nm technologies Strong data analysis skills to fetch data, analyze and provide practical insights "Nice To Have" Skills and Experience : Masters in Electrical Engineering Strong coding skills in Python or R or an equivalent language Strong presentation skills Salary Range From $2 46,925.00 To $ 319,550.00 We value people as individuals and our commitment is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process. In Return: We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

#hiring Senior Principal Engineer - Signoff, San Jose, United States, fulltime #jobs #jobseekers #careers #SanJosejobs #Californiajobs #Engineering Apply: https://lnkd.in/g_AhNagM Job Overview: Arm has formed a new group to develop outstanding silicon demonstrators based on Arm's IP compute sub-system solutions and addressing markets such as premium mobile, infrastructure and automotive. Using the latest nodes, e.g. 3nm today, and applying the latest SoC 2.5D and 3D technology, Arm's ambition is to demonstrate industry outstanding performance by architecting, designing, implementing, and fabricating innovative silicon chips. Responsibilities: Your responsibilities will involve developing challenging electrical signoff methodologies. These methodologies will balance accuracy and yield on silicon. The following are the immediate challenges we will be working on as a team: We will develop a Static Timing Analysis flow that is standardized and is usable by all silicon groups within Arm We will work on strengthening our methodologies to analyze static and dynamic IR drop on the SoC. We will release a qualified flow that enable STA with back annotated voltage Electromigration analysis at the SoC level is another key responsibility of this role. Including Local thermal effects as part of electromigration analysis is a key criteria! Soft Error rate is a key concern for Infrastructure and Automotive SoC's. We will develop methodologies to analyze and alleviate the impact of Soft Error rate on SoC's Required Skills and Experience : Experience in developing Signoff methodologies such as Aging, STA, EM IR in advanced process nodes. Experience in collaborating across silicon engineering groups in your organization as well as with EDA vendors Work experience in Physical Implementation and Signoff methodologies Must have worked on methodology development on 5nm or 3nm technologies Strong data analysis skills to fetch data, analyze and provide practical insights "Nice To Have" Skills and Experience : Masters in Electrical Engineering Strong coding skills in Python or R or an equivalent language Strong presentation skills Salary Range From $2 46,925.00 To $ 319,550.00 We value people as individuals and our commitment is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process. In Return: We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

#hiring Senior Principal Engineer - Signoff, San Jose, United States, fulltime #jobs #jobseekers #careers #SanJosejobs #Californiajobs Apply: https://lnkd.in/gHJm88eh Job Overview: Arm has formed a new group to develop outstanding silicon demonstrators based on Arm's IP compute sub-system solutions and addressing markets such as premium mobile, infrastructure and automotive. Using the latest nodes, e.g. 3nm today, and applying the latest SoC 2.5D and 3D technology, Arm's ambition is to demonstrate industry outstanding performance by architecting, designing, implementing, and fabricating innovative silicon chips. Responsibilities: Your responsibilities will involve developing challenging electrical signoff methodologies. These methodologies will balance accuracy and yield on silicon. The following are the immediate challenges we will be working on as a team: We will develop a Static Timing Analysis flow that is standardized and is usable by all silicon groups within Arm We will work on strengthening our methodologies to analyze static and dynamic IR drop on the SoC. We will release a qualified flow that enable STA with back annotated voltage Electromigration analysis at the SoC level is another key responsibility of this role. Including Local thermal effects as part of electromigration analysis is a key criteria! Soft Error rate is a key concern for Infrastructure and Automotive SoC's. We will develop methodologies to analyze and alleviate the impact of Soft Error rate on SoC's Required Skills and Experience : Experience in developing Signoff methodologies such as Aging, STA, EM IR in advanced process nodes. Experience in collaborating across silicon engineering groups in your organization as well as with EDA vendors Work experience in Physical Implementation and Signoff methodologies Must have worked on methodology development on 5nm or 3nm technologies Strong data analysis skills to fetch data, analyze and provide practical insights "Nice To Have" Skills and Experience : Masters in Electrical Engineering Strong coding skills in Python or R or an equivalent language Strong presentation skills Salary Range From $2 46,925.00 To $ 319,550.00 We value people as individuals and our commitment is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process. In Return: We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

#hiring Senior Principal Engineer - Signoff, San Jose, United States, fulltime #jobs #jobseekers #careers #SanJosejobs #Californiajobs #Engineering Apply: https://lnkd.in/g_AhNagM Job Overview: Arm has formed a new group to develop outstanding silicon demonstrators based on Arm's IP compute sub-system solutions and addressing markets such as premium mobile, infrastructure and automotive. Using the latest nodes, e.g. 3nm today, and applying the latest SoC 2.5D and 3D technology, Arm's ambition is to demonstrate industry outstanding performance by architecting, designing, implementing, and fabricating innovative silicon chips. Responsibilities: Your responsibilities will involve developing challenging electrical signoff methodologies. These methodologies will balance accuracy and yield on silicon. The following are the immediate challenges we will be working on as a team: We will develop a Static Timing Analysis flow that is standardized and is usable by all silicon groups within Arm We will work on strengthening our methodologies to analyze static and dynamic IR drop on the SoC. We will release a qualified flow that enable STA with back annotated voltage Electromigration analysis at the SoC level is another key responsibility of this role. Including Local thermal effects as part of electromigration analysis is a key criteria! Soft Error rate is a key concern for Infrastructure and Automotive SoC's. We will develop methodologies to analyze and alleviate the impact of Soft Error rate on SoC's Required Skills and Experience : Experience in developing Signoff methodologies such as Aging, STA, EM IR in advanced process nodes. Experience in collaborating across silicon engineering groups in your organization as well as with EDA vendors Work experience in Physical Implementation and Signoff methodologies Must have worked on methodology development on 5nm or 3nm technologies Strong data analysis skills to fetch data, analyze and provide practical insights "Nice To Have" Skills and Experience : Masters in Electrical Engineering Strong coding skills in Python or R or an equivalent language Strong presentation skills Salary Range From $2 46,925.00 To $ 319,550.00 We value people as individuals and our commitment is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process. In Return: We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.