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SOl & Engineered Substrates

SOl & Engineered Substrates

半导体制造业

Newton,Massachusetts 3,196 位关注者

Accelerating SOI Industry Growth

关于我们

The SOI Industry Consortium is a group of leading companies from the electronics industry with the mission of accelerating silicon-on insulator (SOI) innovation into broad markets by promoting the benefits of SOI technology and reducing the barriers to adoption. - The SOI Industry Consortium strives to be the unifying voice of the SOI based industry. - The organization's mission is to both enable the extensive use of SOI design and technology by removing economic and technical barriers and to accelerate innovation to further amplify the value to the end customer. - The SOI Industry Consortium provides its members with a platform for meaningful global collaborations throughout the value chain.

网站
https://www.semi.org/en/soiconsortium
所属行业
半导体制造业
规模
2-10 人
总部
Newton,Massachusetts
类型
非营利机构

地点

SOl & Engineered Substrates员工

动态

  • Researchers have created an environment friendly photo-driven electronic skin using micro-pillar p-type Si thin-film and NIR irradiation unit. The fabrication of micro-pillar p-type Si thin-film starts with SOI wafers. It is note that this electronic skin can convert the optical energy into a pulsed alternating current signal and exert the electrical stimulation directly on the wound to enhance skin regeneration of the refractory wound. Read more: https://lnkd.in/ePST-J5M #SOI #semiconductor #research

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  • SOl & Engineered Substrates转发了

    查看CEA-Leti的组织主页

    32,852 位关注者

    [SCALING QUANTUM COMPUTING] CEA-Leti, in collaboration with Quobly, CEA-List, and CEA-Irig, has developed a unique ????-?????? ????????-?????????? ?????????????? ???????????????? that enables ???????????????????????? ?????????????????????? ???????????????? ???? ???????????????? ?????????????? ?????????????? while slashing power consumption by ?????? and reducing footprint by ????. Presented at ?????????? ????????, the paper "???? ????.??μ??/?????????? ????????-???????? ????????????-?????????????? ???? ?????????????????????????? ?????? ???????????????????????? ?????? ???????? ????????????" introduces a capacitive-feedback transimpedance amplifier (CTIA) that achieves 18.5μW/qubit power consumption, a significant tenfold reduction compared to state-of-the-art circuits—all while maintaining an ultra-compact design. ?????? ???????? ?????????????? ?????? ?????????????? ??????????????????: ? ???????????????? ?????????????? ?????????????? – Enables measurement of thousands of silicon qubits with fewer wires ? ??????????-?????????????????? ???????????????????????? – Achieves record-low consumption for simultaneous qubit readout ? ?????????????? ?????? ????????-???????????????????? – Avoids bulky inductors, aligning with industrial semiconductor processes "???????? ???? ?????? ?????????? ???????? ???????? ????-??????????????-??-???????????????????? ???????????? ???? ?????? ?????? ???????? ???????? ???? ?????????????? ?????? ???????????????????????? ?????????????? ???? ?????????????? ????????????," said Franck Badets (CEA-Leti). "????????????’?? ???????? ???? ???? ?????????????????? ??????????-?????????? ?????????????? ?????????????????? ?????????? ???? ??????????????. ???????? ?????????? ???????????????????????? ?????? ???????????????? ???????????? ?? ???????????????? ?????????????? ???? ?????? ???????????? ?????? ???? ?? ?????????? ?????????????? ???? ?????? ??????????????," added Tristan Meunier (Quobly). With the co-integration of classical electronics at cryogenic temperatures, this innovation unlocks new efficiencies in quantum computing hardware—bringing us closer to practical, fault-tolerant quantum processors. More info: https://lnkd.in/d-NrNc7i ?? Credits: Mickael ALVES DE CARVALHO/CEA Ny Koloniaina RAHASAMISANDRATRA | Maud Vinet #QuantumComputing #FDSOI #ISSCC2025 #Startup #Innovation

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  • Experimental findings demonstrate that during the formation of Cavity-SOI, dry etching can accurately fabricate cavities of predefined dimensions, wafer-level Au–Si eutectic bonding can achieve efficient sealing, and chemical mechanical polishing can precisely regulate the depth of cavities, thus validating the feasibility of the Cavity-SOI formation process. ? Read more: https://lnkd.in/dt4q_m2v ? #SOI #semiconductor #research #MEMS

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  • Understanding the thermal influence on gallium nitride (GaN) single crystal substrates is critical for the advancement of GaN-based optoelectronic devices. This study reports for the first time the dielectric function of Silicon doped GaN substrates from room temperature to 873 K over the wavelength from 250 nm to 1600 nm. It is found that the temperature dependence of both the exciton transition and the refractive index of the substrate is lower than that reported in thin films. Read more: https://lnkd.in/eYsZ9SuW #GaN #semiconductor #research #optoelectronic

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  • A polarization-splitting grating coupler (PSGC) is a key component for silicon photonic integrated circuits, which achieves light coupling from/to a fiber for both polarizations. Here a high-performance PSGC designed by an inverse design method is proposed. Experimental results indicate a peak insertion loss of -1.05 dB and a polarization-dependent loss of 0.04 dB at 1534.7 nm, which are believed to be the lowest on current 220nm-silicon on insulator (SOI) platforms. Read more: https://lnkd.in/eTqdFr6H #SOI #semiconductor #photonic #research

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  • Optical phased array (OPA) has the advantages of fast scanning speed, high reliability, and the ability to achieve all-solid-state scanning and scanning at any position, making it a promising solution for all-solid-state LiDAR. In this paper, a 128-channel aperiodic OPA based on standard SiN-on-SOI integrated process platform is presented. Read more: https://lnkd.in/eG68xAWB #SOI #SiN #semiconductor #research #LiDAR

    • Fabrication process of OPA based on SiN-on-SOI platform.
  • SOl & Engineered Substrates转发了

    查看SOITEC的组织主页

    54,059 位关注者

    We’re thrilled to announce that Ionut Radu, our Executive VP of R&D will be a key speaker at #SEMICONKorea 2025! ?? Date: February 19, 2025 ?? Time: 1.50PM-2.15PM ?? Location: Room 308 Learn about the "Breakthrough in Substrate Technologies for Energy-Efficient Electronics" as Ionut explores cutting-edge substrate innovations driving the next generation of energy-efficient electronics. Don’t miss this chance to dive into the future of Advanced Materials & Process Technology! More infos here: https://lnkd.in/gN6kEJMS #SEMICONKorea2025 #TechInnovation #AdvancedMaterials #EnergyEfficient #Semiconductors #SOITEC

    查看Ionut Radu的档案

    Head of Soitec U.S. Innovation, Semiconductor Technologist/IEEE Fellow

    I’m pleased to present this week our recent developments of substrate engineering for energy-efficient devices. #Soitec #innovation

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  • This work presents predictive simulations for a novel mid-infrared (MIR) polarization splitter and rotator (PSR) design. It operates in the 3.1–3.6μm range, which is crucial for applications such as chemical and biological sensing. This is the first report of a MIR PSR in this range on a silicon-on-insulator (SOI) platform, enabling the generation of transverse electric modes at both ports of the PSR. Read more: https://lnkd.in/eEbdd-VK ? #SOI #semiconductor #research #technology #sensing

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  • Graphene/n-Si (G/n-Si) heterojunction patterned on silicon-on-insulator (SOI) substrates emerges as promising candidate for the realization of multi-pixel light sensing devices operating at zero bias voltage. In this study, a proof-of-concept for self-powered 2D photodiode array device structure based on the integration of monolayer graphene with SOI substrate is presented. Research found that high resolution image sensing or multiple pixel optical detection applications can be realized by increasing the density of the G/n-Si pixels with homogeneous active junction area on a graphene/SOI platform. ? Read more: https://lnkd.in/eRV2HFAt ? #SOI #semiconductor #research #technology #sensing

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