Quadric

2024 was a year of tremendous momentum building for Quadric. Read co-founder and CEO Veerbhan Kheterpal's interview in SemiWiki https://lnkd.in/gwqeweA8

Just when you thought the pace of change of AI models couldn’t get any faster, it accelerates yet again. https://lnkd.in/gmxjZKcG

It’s Not All About the MACs: Why “Offload” Fails - For five years, Quadric has been saying that the key to future-proofing your ML solution is to make it programmable in a much more efficient way than just tacking on a programmable core to a bunch of Macs. Read our blog at https://lnkd.in/gkk3Tjaz

I'm just going to quote our CEO Veerbhan Kheterpal as he summarized how important this milestone is for Quadric. Congratulations to the team and looking forward to continued innovation and more wonderful news. "As a marquee Tier 1 automotive supplier throughout the world, DENSO subjected our technology to a comprehensive and intense benchmarking exercise. Being selected by DENSO as their ADAS/AD processor IP partner is a great validation of the growing maturity and breadth of Quadric’s GPNPU processors." --Quadric.inc Veerbhan Kheterpal, CEO https://lnkd.in/gb_xBUKj

To every member of Team Quadric, thank you for making our vision of painless machine learning inference a reality. Your relentless dedication is helping enable safer vehicles and will contribute to eliminating traffic fatalities. #Innovation #AI #Semiconductors #ADAS ` https://lnkd.in/geVcmwuY

What's the best choice for the placement of memory relative to compute in the NPU system hierarchy? https://lnkd.in/gDbwAhdu

The best alternative for SoC designers is a solution that both take advantage of small local SRAMs – preferably distributed in large number among an array of compute elements – as well as intelligently scheduled data movement between those SRAMs and the off-chip storage of DDR memory in a way that minimizes system power consumption and minimizes data access latency. https://lnkd.in/g3fMEUBZ

What's so new about Quadric's accelerator? Read Bernard Murphy's blog post: https://lnkd.in/gJgBhkvk

What does it take to run ConvNext on your chip? Performance is poor if you're relying on a standard NPU plus DSP. But look how it performs on the Chimera GPNPU. https://lnkd.in/gzF5wK3i

Quadric continues to grow! Our product capability expands again with the introduction of our 3rd generation architecture. And the team is also growing! Join the excitement!