PCI-SIG

Today is the first day of the PCIe 6.X Preliminary FYI Workshop in San Francisco, California. This event will be held from March 24-28, and is intended to assist in the development of the PCIe 6.X Compliance Program. #PCISIG #PCIe #PCISIGCompliance

By becoming a PCI-SIG member, your company can gain access to Compliance Workshops, Developers Conferences and more – while also being able to participate in specification revisions and addendum proposals. Learn about the benefits of membership on the PCI-SIG website > https://bit.ly/3Tffa3l ? #PCISIG #PCIe #CopprLink #optical

Want to learn more about how PCIe technology is used in Generative AI to produce content such as audio and video? PCI-SIG member David Kulansky (Alphawave Semi) explains how PCIe technologies can be used to support a disaggregated ecosystem in multi-rack server applications. Watch the video > https://bit.ly/3UjQyJE #PCISIG #PCIe #AI #generativeAI #server

Join us for the upcoming PCI-SIG Compliance Workshop #134 hosted in South San Francisco, California from May 5-9, 2025. This event will include Integrators List product testing for PCIe 4.0 and PCIe 5.0 products. Learn more about the upcoming Compliance Workshop > https://bit.ly/41Mg4eM #PCISIG #PCIe

We are pleased to share that PCIe 7.0 specification, version 0.9 is now available for member review. This specification version brings us one step closer to the full release of the PCIe 7.0 specification, targeted for 2025. Read the full blog post from PCI-SIG President and Chairperson Al Yanes to learn more: https://bit.ly/3DSzGF1 #PCIe #PCISIG #AI #ML #HPC #Datacenter

There is only one week left for PCI-SIG Members to submit papers for the upcoming Members Implementation Track at the PCI-SIG Developers Conference in Santa Clara, California from June 11-12, 2025. Accepted submissions will be presented in-person during the DevCon, and will emphasize specific challenges, issues or methods relating to PCI-SIG technology. Abstracts must be received by next Monday, March 24 > https://bit.ly/41jD5Wf #PCISIG #PCIe #PCISIGDevCon25

In our latest blog, PCI-SIG member Luigi (Lou) Ternullo (Rambus) discusses the benefits of PCIe security features such as Integrity and Data Encryption (IDE) and Trusted Execution Environment Device Interface Security Protocol (TDISP). Read the blog to learn how the features continue to evolve to meet industry needs > https://bit.ly/3EVT97W #PCISIG #PCIe #security #IDE #TDISP

PCI-SIG Members are invited to submit papers for the upcoming Members Implementation Track at the PCI-SIG Developers Conference in Santa Clara, California from June 11-12, 2025. Accepted submissions will be presented in-person during the DevCon, and will emphasize specific challenges, issues or methods relating to PCI-SIG technology. Abstracts must be received by Monday, March 24 > https://bit.ly/41jD5Wf #PCISIG #PCIe #PCISIGDevCon25

Register today for PCI-SIG Compliance Workshop #134 hosted in South San Francisco, California from May 5-9, 2025. This event will include Integrators List product testing for PCIe 4.0 and PCIe 5.0 products. Learn more about the upcoming Compliance Workshop > https://bit.ly/41Mg4eM #PCISIG #PCIe

PCI-SIG Board Member Debendra Das Sharma (Intel Corporation), explains the features included in the PCIe 6.0 specification, such as FEC, CRC, Flit Mode, and PAM4. Watch the full video on the PCI-SIG YouTube Channel > https://bit.ly/3DZzL7A #PCISIG #PCIe #PAM4 #FEC #CRC #FlitMode