Cornell Zhang Research Group

?? Best Paper Award at ISPD 2025! ??? We are honored to receive the Best Paper Award at the International Symposium on Physical Design (ISPD) 2025 for our work on Cypress: VLSI-Inspired PCB Placement with GPU Acceleration.? As PCB designs grow in scale and complexity, placement remains a critical challenge, often requiring weeks of manual effort. Cypress introduces a GPU-accelerated, VLSI-inspired approach that significantly improves routability, wirelength, and runtime efficiency compared to existing tools. Additionally, we present an open-source benchmark suite to drive future advancements in automated PCB placement.? This work was led by Niansong Zhang during his internship with the Design Automation Research group at NVIDIA Research, in collaboration with Anthony Agnesina, Noor Shbat, Yuval Leader, Mark H. R. (NVIDIA Research). ?? Paper: https://lnkd.in/eTUgGFtp ?? ISPD 2025 Program: https://lnkd.in/erD_Uf2Q ?? Code & Benchmarks: https://lnkd.in/eqmKkUPu Congrats to all authors! ??? #ISPD2025 #BestPaperAward #PCBPlacement #GPUAcceleration #VLSI #EDA #Research #ZhangGroup #NVIDIAResearch

?? Best Paper Award at ISPD 2025! ??? We are honored to receive the Best Paper Award at the International Symposium on Physical Design (ISPD) 2025 for our work on Cypress: VLSI-Inspired PCB Placement with GPU Acceleration.? As PCB designs grow in scale and complexity, placement remains a critical challenge, often requiring weeks of manual effort. Cypress introduces a GPU-accelerated, VLSI-inspired approach that significantly improves routability, wirelength, and runtime efficiency compared to existing tools. Additionally, we present an open-source benchmark suite to drive future advancements in automated PCB placement.? This work was led by Niansong Zhang during his internship with the Design Automation Research group at NVIDIA Research, in collaboration with Anthony Agnesina, Noor Shbat, Yuval Leader, Mark H. R. (NVIDIA Research). ?? Paper: https://lnkd.in/eTUgGFtp ?? ISPD 2025 Program: https://lnkd.in/erD_Uf2Q ?? Code & Benchmarks: https://lnkd.in/eqmKkUPu Congrats to all authors! ??? #ISPD2025 #BestPaperAward #PCBPlacement #GPUAcceleration #VLSI #EDA #Research #ZhangGroup #NVIDIAResearch

?? Hongzheng Chen and Niansong Zhang will be giving a tutorial on Allo, our proposed accelerator design language, at FPGA’25 on March 1st from 9:00 AM to 12:15 PM PT. ????On March 2nd, we’ll also be presenting our talk, "Allo: Catalyzing Accelerator Design and Programming for Machine Learning," at the C4ML workshop at CGO’25 at 2:20 PM PT. We’re looking forward to connecting with everyone in Monterey and Las Vegas! If you’re attending, we’d love to see you at our session. The tutorial and slides will be available on our GitHub repository after the talk—stay tuned! ?? - Repository: https://lnkd.in/guYQEwce #FPGA25 #CGO25 #HPCA25 #PPoPP25 #Allo #AcceleratorDesign #MachineLearning

We are thrilled to announce the upcoming presentation of our paper, "Rapid GPU-Based Pangenome Graph Layout," at the SC'24 conference in Atlanta. Jiajie Li will present our work on Nov 19 from 16:00–16:30 EST during the session Advanced Computational Methods and Architectures. Computational Pangenomics is an emerging field that explores genetic variation using graph structures spanning multiple genomes. Visualizing pangenome graphs is essential for understanding genome diversity, but handling large graphs poses significant computational challenges for layout generation. We introduce a rapid GPU-based pangenome graph layout solution, reducing the run time for the entire human pangenome from hours to just a few minutes, achieving over 50x speedup compared to state-of-the-art CPU methods. This advancement facilitates interactive visualization and enables studies of population-scale genetic variability that were previously infeasible. This is a collaboration work between Cornell and UTHSC. Congratulations to all our co-authors: Niklas Schmelzle, Yixiao Du, Simon Heumos, Andrea Guarracino, Giulia Guidi, Pjotr Prins, Erik Garrison, and Zhiru Zhang. If you're attending SC'24, don't miss the chance to join us and engage in discussions! ?? Paper: https://lnkd.in/eihZDC3B ?? Program: https://lnkd.in/eADPtgDK ???? Code: https://lnkd.in/epTGpd2n

Interested in next-generation formats for AI accelerators? Please check out our new ICML paper: “Learning from Students: Applying t-Distributions to Explore Accurate and Efficient Formats for LLMs”. It provides a large analysis of LLM weights and activations using Student's t-distributions. Then, it uses this to propose a new lookup format, Student Float, which outperforms prior formats including the popular NF4 format during weight-only quantization. Finally, it proposes two lightweight “supernormal” extensions to the E2M1 format for weight-activation quantization and maps the accuracy-efficiency Pareto curves between INT4, E2M1, and these extended formats. This work is in collaboration with Yuzong Chen and Mohamed Abdelfattah from Cornell Tech, Bahaa Kotb at Cornell, and Sushma Prasad, Gang Wu, and Sheng Li at Google. If you happen to be in Vienna at ICML, Jordan Dotzel will be presenting our poster (#904) next Tuesday (Jul 23) from 11:30AM - 1:00PM local time in Hall C. Please stop by the poster session to discuss more about formats and efficient ML! Paper:?https://lnkd.in/e2jE673h Code:?https://lnkd.in/eVFp3ZCJ

Congratulations to Hongzheng for Winning the Third Place in the ACM SIGPLAN Student Research Competition (SRC) at PLDI'24!

We are delighted to share that our paper, "Allo: A Programming Model for Composable Accelerator Design," has been accepted to the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI). Hongzheng Chen will present our work in Copenhagen, Denmark, on June 28, from 13:40 to 14:00 CET. Our work introduces Allo, a new Python-embedded accelerator design language (ADL) that decouples hardware customizations from algorithm specifications, with a specific focus on enhancing composability. Utilizing Allo, we can achieve state-of-the-art performance in both single-kernel and multi-kernel designs with minimal programming effort. We also demonstrate the scalability by designing a high-performance LLM spatial accelerator using Allo. The framework is open-source on GitHub, please feel free to take a look! ?? Paper: https://lnkd.in/g2AkmVcR ???? Repository: https://lnkd.in/guYQEwce ?? Program: https://lnkd.in/gEjeWRhx

Looking for a powerful yet scalable graph learning model for circuits? Welcome to check out our upcoming paper at DAC’24, titled “Less is More: Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits”. Our work introduces a purely dense model for learning circuit representations, making it highly parallelizable and well-suited for hardware accelerators. Besides, our novel gated self-attention scheme effectively captures critical and complex circuit structures, leading to better generalizability than prior arts for QoR prediction and functional reasoning tasks. Chenhui Deng will be presenting our work at Moscone West, San Francisco on Jun 26, during Session “AI Paradigms beyond Deep Neural Networks” (11:45am?-?12:00pm?PDT). Congratulations to all our co-authors! If you're in the area, don't miss the chance to attend and engage with us! Paper: https://lnkd.in/ennr6gqk Code: https://lnkd.in/emyffNU5

We are delighted to announce that our paper, "Understanding the Potential of FPGA-Based Spatial Acceleration for Large Language Model Inference," has been accepted for publication in the FCCM'24 Journal Track and will appear in ACM Transactions on Reconfigurable Technology and Systems (TRETS). Hongzheng Chen will be presenting our work at the FCCM’24 conference in Orlando on May 7, during Session 6 (15:00-16:20 EST). Our work introduces an analytical model aimed at estimating performance and offering valuable insights into the design of high-performance FPGA-based LLM accelerators. Congratulations to all our co-authors! If you're nearby, don't miss the opportunity to attend and engage with us! ?? Paper: https://lnkd.in/gysFAW6q ?? Program: https://lnkd.in/g5-2Ewc8

Interested in a powerful and efficient Transformer model for graph data? Welcome to check out our upcoming paper at ICLR'24, titled “Polynormer: A Polynomial-Expressive Graph Transformer in Linear Time”. The concept of learning polynomial functions dates back to the last century. Our work revisits this idea by integrating it into the Transformer model. We theoretically demonstrate Polynormer’s expressivity by showcasing its ability to learn high-degree polynomials in an efficient manner. Our experimental results demonstrate that Polynormer achieves state-of-the-art results across various important graph datasets, including Google TpuGraphs, an industrial-scale graph benchmark used for predicting AI model run time on TPUv3. ?? Paper: https://lnkd.in/eBh77e8d ???? Code: https://lnkd.in/e9-nFxHx ?? Talk: A 5-min presentation by Chenhui Deng will be hosted on ICLR'24 website and our YouTube channel (https://lnkd.in/eK4Y6ShT) for asynchronous viewing after the conference.