What are some of the best practices and tools for mixed signal simulation and verification?

1 Choose the right simulation model

The first step in mixed signal simulation and verification is to choose the right simulation model for your design. Depending on the level of abstraction, accuracy, and complexity, you can use different types of models, such as SPICE, Verilog-A, Verilog-AMS, or SystemVerilog. Each model has its own advantages and disadvantages, so you need to consider the trade-offs between speed, accuracy, and compatibility. For example, SPICE models are very accurate and detailed, but they can be slow and incompatible with digital models. Verilog-AMS models are faster and more compatible, but they can be less accurate and require more coding skills.

2 Use a mixed signal simulator

The next step is to use a mixed signal simulator that can handle both analog and digital domains in your design. A mixed signal simulator allows you to perform different types of simulations, such as DC, AC, transient, noise, or mixed mode, and analyze the interactions and effects between the analog and digital components. A mixed signal simulator also enables you to perform verification tasks, such as checking the functionality, timing, power, and signal integrity of your design. Some examples of mixed signal simulators are Cadence Virtuoso AMS Designer, Mentor Graphics Questa ADMS, or Synopsys HSPICE.

3 Apply design for testability techniques

Another best practice for mixed signal simulation and verification is to apply design for testability (DFT) techniques to your design. DFT techniques help you improve the testability and debuggability of your design, by adding features such as scan chains, test points, test modes, or built-in self-test (BIST). DFT techniques can also help you reduce the cost and time of testing, by increasing the fault coverage, reducing the test vector size, or simplifying the test equipment. Some examples of DFT techniques are IEEE 1149.1 boundary scan, IEEE 1500 core test wrapper, or IEEE 1687 internal scan.

4 Use a verification methodology

A verification methodology is a systematic and structured approach to verify your design against the specifications and requirements. A verification methodology can help you improve the quality and efficiency of your verification process, by providing guidelines, tools, and best practices for planning, developing, executing, and documenting your verification activities. A verification methodology can also help you cope with the increasing complexity and diversity of mixed signal designs, by enabling reusability, scalability, and automation. Some examples of verification methodologies are UVM-AMS, VMM-AMS, or OVM-AMS.

5 Leverage formal methods

Formal methods are mathematical techniques that can help you verify your design in a rigorous and exhaustive way. Formal methods can help you prove the correctness, completeness, and consistency of your design, by using logic, algorithms, and models. Formal methods can also help you find and fix bugs, errors, or inconsistencies that may be missed by conventional simulation methods. Some examples of formal methods are equivalence checking, property checking, or model checking.

6 Adopt a continuous integration approach

A continuous integration (CI) approach is a software engineering practice that can help you improve the quality and reliability of your design, by integrating and testing your design frequently and automatically. A CI approach can help you detect and resolve issues early in the design cycle, by using tools such as version control, code review, regression testing, or coverage analysis. A CI approach can also help you accelerate the design process, by enabling collaboration, feedback, and automation. Some examples of CI tools are Git, Jenkins, or SonarQube.

7 Here’s what else to consider

This is a space to share examples, stories, or insights that don’t fit into any of the previous sections. What else would you like to add?