What are the common pitfalls and solutions for ARM interrupt handling in RTOS?

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Interrupt handling is a crucial aspect of embedded software development with real-time operating systems (RTOS) on ARM architecture. Interrupts are signals that notify the processor of an event or a condition that requires immediate attention, such as a timer expiry, a sensor reading, or a communication request. However, interrupt handling also poses some common pitfalls and challenges that can affect the performance, reliability, and correctness of your RTOS application. In this article, we will discuss some of these pitfalls and their solutions, based on the ARM Cortex-M series of microcontrollers.

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Austin Kim

Linux kernel Engineer | Author | RISC-V | Arm | 4x LinkedIn Top Voice ??

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Cmdr (Dr.?) Reji Kurien Thomas , FRSA, MLE?

I Empower Sectors as a Global Tech & Business Transformation Leader| Stephen Hawking Award| Harvard Leader | UK House…
Vijay Kumar Peshkar

Principal Engineering Manager at Qualcomm

1 Priority inversion

One of the pitfalls of interrupt handling is priority inversion, which occurs when a high-priority task is blocked by a low-priority task that holds a shared resource, such as a mutex or a semaphore. This can cause the high-priority task to miss its deadline, or to be preempted by a medium-priority task that is not blocked. To avoid priority inversion, you can use the priority inheritance protocol, which allows the low-priority task to temporarily inherit the priority of the high-priority task that is waiting for the resource. This way, the low-priority task can finish its critical section and release the resource faster, allowing the high-priority task to resume.

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Cmdr (Dr.?) Reji Kurien Thomas , FRSA, MLE?

I Empower Sectors as a Global Tech & Business Transformation Leader| Stephen Hawking Award| Harvard Leader | UK House of Lord's Awardee | Fellow Royal Society | CyberSec | CCISO CISM
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Common pitfalls in ARM interrupt handling within an RTOS include priority inversion, where a lower-priority task holds a resource needed by a higher-priority one, causing delays. Solutions involve – Implementing priority inheritance protocols where the lower-priority task temporarily adopts the higher one's priority Using priority ceiling protocols to prevent a task from running unless it can proceed without being blocked Carefully designing interrupt service routines (ISRs) to be short and fast, deferring longer processing to task level Ensuring that ISRs and tasks use different priorities and that the system correctly handles nested interrupts

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Vijay Kumar Peshkar

Principal Engineering Manager at Qualcomm
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PI is avoidable to a good extent when we limit the resource sharing across tasks runnings at different priorities and also limiting time the resource is locked. Also chain blocking is a bigger challenge/risk than simple PI.

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2 Stack overflow

Stack overflow is a common pitfall of interrupt handling, which happens when the stack memory allocated for an interrupt service routine (ISR) or a task is not enough to store the local variables, function calls, and context switches. This can cause data corruption, memory leaks, or unexpected behavior. To avoid stack overflow, you can use static analysis tools to estimate the worst-case stack usage of ISRs and tasks and allocate enough stack memory accordingly. Dynamic stack monitoring can detect and report stack overflows at runtime, allowing for appropriate actions like resetting the system or logging the error. Stack guards protect the boundaries of the stack memory from being overwritten by other memory regions. Additionally, you can use the __attribute__((naked)) directive to avoid saving and restoring the registers and the stack pointer in the ISR prologue and epilogue, opting instead to handle context switches with assembly code.

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Austin Kim

Linux kernel Engineer | Author | RISC-V | Arm | 4x LinkedIn Top Voice ??
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In most RTOS, when an interrupt is triggered, the Interrupt Service Routine (ISR) is executed using the process's stack space. If too many function calls are made during interrupt handling, it can lead to a stack overflow. To prevent this, the following measures should be considered: Monitor stack usage during interrupt handling. Allocate a dedicated stack exclusively for interrupt handling. Since stack space is more limited in RTOS compared to more robust operating systems, we must always be cautious of stack overflow.

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3 Nested interrupts

A third pitfall of interrupt handling is nested interrupts, which occur when an ISR is interrupted by another ISR of higher priority. This can increase the interrupt latency, which is the time between the occurrence of an interrupt and the execution of its ISR. Interrupt latency can have a significant impact on the responsiveness and accuracy of your RTOS application, particularly for time-sensitive tasks. To minimize interrupt latency, you can employ strategies such as interrupt masking, tail-chaining, and preemption threshold. Interrupt masking involves disabling lower-priority interrupts while executing an ISR and re-enabling them after completion. Tail-chaining allows you to avoid saving and restoring the registers and stack pointer when switching between ISRs of the same or lower priority, using a single return instruction to exit the ISR. Preemption threshold limits the nesting level of interrupts and defers the execution of lower-priority interrupts to a background task or a software interrupt.

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Iliana Tzima

Professional Services Architect @ Uni Systems ??Azure ??AWS ??Diverse Background ?? Continuous Learner ??Innovative ??Committed to Goals ?? Passionate with IT ?? Like to Mentor & Lead with Empathy
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Interrupt masking is what I used most of the times even in ISR process serving the most critical interrupts first. There might be cases that even in the normal thread execution, interrupts might be disabled for very small amount of time. Polling could also be another way to handle interrupts sometimes depending on the design and functionality of course.

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4 Coding errors

A fourth pitfall of interrupt handling is coding errors, which are mistakes or bugs in the ISR code that can cause unexpected results or system failures. These coding errors can be hard to debug and fix, especially if they occur sporadically or unpredictably. To avoid them, you should use simple and clear logic in your ISRs, avoiding complex calculations, loops, or branching statements. Furthermore, volatile keywords or memory barriers can be used to ensure that the compiler does not optimize away or reorder the accesses to shared variables or memory-mapped registers. Additionally, atomic operations or critical sections can be employed to protect the shared variables or resources from concurrent access by multiple ISRs or tasks. Lastly, debug tools or instrumentation can be used to trace and monitor the execution and performance of your ISRs, so as to identify any anomalies or bottlenecks. Interrupt handling is an essential skill for embedded software development with RTOS on ARM architecture; with a knowledge of the common pitfalls and appropriate solutions, you can enhance the quality and efficiency of your RTOS application.

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5 Here’s what else to consider

This is a space to share examples, stories, or insights that don’t fit into any of the previous sections. What else would you like to add?

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What are the common pitfalls and solutions for ARM interrupt handling in RTOS?

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1 Priority inversion

2 Stack overflow

3 Nested interrupts

4 Coding errors

5 Here’s what else to consider

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